I am a 5th year PhD candidate in Computer System Laboratory (CSL) at Cornell University. My research interests are computer architecture, high level synthesis and very large scale integration. I am being advised by Prof. David Albonesi and Prof. Zhiru Zhang. You can find my CV.
PhD in Computer Architecture
BTech in Electrical Engineering, 2014
Indian Institute of Technology, Kanpur
We present a language and compilation framework for productively generating high-performance systolic arrays for dense tensor kernels on spatial architectures, including FPGAs and CGRAs. It decouples a functional specification from a spatial mapping, allowing programmers to quickly explore various spatial optimizations for the same function. The actual implementation of these optimizations is left to a compiler. Thus, productivity and performance are achieved at the same time.
I have been TA for following courses at Cornell University: