I am a software engineer in the edge TPU group at Google. I completed my Ph.D. at Cornell University where I developed domain-specific language, T2S-Tensor, to productively generate high-performance accelerators for dense tensor computations and a domain-specific hardware, Tensaurus, to accelerate mixed sparse-dense tensor computations. I was advised by Prof. David Albonesi and Prof. Zhiru Zhang. You can find my CV.
I am interested in re-thinking algorithm, language and hardware design to accelerate sparse and dense tensor algebra. I completed my Bachelor of Technology in Electrical Engineering at Indian Institute of Technology, Kanpur, where I was awarded with President’s Gold Medal.
PhD in Computer Architecture
BTech in Electrical Engineering, 2014
Indian Institute of Technology, Kanpur
We present a language and compilation framework for productively generating high-performance systolic arrays for dense tensor kernels on spatial architectures, including FPGAs and CGRAs. It decouples a functional specification from a spatial mapping, allowing programmers to quickly explore various spatial optimizations for the same function. The actual implementation of these optimizations is left to a compiler. Thus, productivity and performance are achieved at the same time.
I have been TA for following courses at Cornell University: